Descriptive/Declaretive Structures
Low
High
HTML, XML, JSON
Scripting Interpreters
Python, Perl, Lua, JS, PHP
VM/Drivers/Executables
C, C++, C#, Java, Pascal
CPU Instructions
Assembler, Machinecode
CPU
RAM
Data
Address
Address | Data |
---|---|
0 | 01100010110010111100011000011011 |
1 | 11111100111001110110000001110101 |
2 | 10001100111001110110000001110100 |
32 Bit
Address | Data |
---|---|
0 | 1000001011100101110101001011101100000000011000101010111111111100 |
1 | 1000101011100101110101001011101100001110011000101010111111111100 |
2 | 0010101011100101110101001011101110000000110001010101111111111001 |
64 Bit
Registers
EAX
EBX
ECX
EDX
ESP
STATUS FLAGS
...
...
...
Arithmetic Logic Unit
(ALU)
+,-, *,/
PROGRAM COUNTER
INPUT/OUTPU
Function (Argument #0, Argument #1)
Opcode (Oprand #0, Oprand #1)
Register
Memory
Address
Constant
Example:
{ADDRESS/LINE} {OPCODE} {OPRAND} {OPRAND}
0 MOVE EAX [2]
1 MOVE EBX [5]
2 MOVE ECX [6]
3 MOVE EDX 0
4 ADD EDX EAX
5 ADD EDX EBX
6 SUB EDX ECX
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