Why?

• It's a basic course (2nd semester)
• It's only a semester long
• It requires both theory and labs
• Now CMC students can (not) choose from
  • Simple, but outdated course
  • Modern, but overstructured course

Basic Course

• Aim:
  • the reason behind computer architecture
  • …supported by practice
• Goals:
  • Simulation of diverse model CPU types
  • Modern computer architecture principles
  • …illustrated by autocode examples
  • Assembly language practice
• Length: 54 a. h. lectures + 54 a. h. labs

Others

Officially there is also two educational paths

• «Simple»
  • 16-bit Intel
  • MASM / DOS
• «Modern»
  • x86_64
  • Nasm / Linux

Both concentrated on assembly more than on architecture

(for different reasons though)

How?

• CMC Model Machine familly
• Main architecture: MIPS32
• Main tool: MARS
• LMS: Moodle
• Homework tests: EJudge

Model Machines

• 3-address
• 2-address
• 1-address
• Indeterminate length
• Register

MIPS32

• Still alive
• Relatively simple instruction set with no legacy
• ⇒ «Modern»/«Coherent» balance
• Intelligible features (like pipe, cache etc.)
• Easy to emulate (MARS, SPIM, QEMU, others)

MARS

• MIPS32 instruction set
• IDE / Simulator / Debugger
• Tools
• CLI simulation
• MIPS memory models
• Traps / exceptions / interrupts / MMIO
• Syscalls
• FPU / control CPU (partial)
• Pseudoinstructions / macros / includes

Moodle

• Used at MSU CMC
• Lectures
• Papers and other stuff
• Labs
• Tests
• Logged chat

EJudge

It is contest management system, but also used for homework testing/checking

• Used at MSU CMC
• Rebuilds program before checking
• Can verify (among others):
  • Program output over reference input/output
  • Program footprint and execution time
  • Program source
• Both modelmachine.py and MARS run as GUI-less interpreters

What?

• Model Machines
• MARS:
  • Simulator+IDE
  • Peripherials
  • Cache
  • Graphics

Model Machines

• Hexadecimal code
• Text program format
• Input/output
• Interpreter
• Debugger
• Primitive assembly
• Writen in python

MIPS Assembler and Runtime Simulator

MARS peripherials

• MMIO
• Polling
• Interrupts
• Kernel programming
• … some virtual devices

Led + buttons

Console

MARS tools

• Cache simulator
• Branch history
• FPU caclulator
• Memory reference
• CPU diagram
• …others

MARS raster graphics

So?

Good practice coverage and technological scope

but

• MM is good, but out of line
• Feature lack in MARS: VM, DMA, multicore etc.
• No time for another platform/emulator
• Switch to RiscV maybe?

Results

• Over 75% lectures are supported by labs
• MM is too stiff framework by design
• There's paradigm gap between MM and MIPS32
• MARS does not cover all our needs
• …but there's no time to involve more simulators
• …say nothing of more architectures

Unsupported features

• Extra architecture models (e. g. stack machine)
• MARS: Pipe is fuzzy (anoter sim is used)
• Not in MARS:
  • Virtual memory
  • Vector / full superscalar flow
  • Multcore
  • Virtualization
  • Predictive calculations
• Assembly to C bridge (absolutely no time)

Futher work

• Extending MARS
• Find out an easy way to involve QEMU/whatever
• Switch to RiscV
  • Visual tool (like MARS)?
  • Subset (like Risc-U)