Register Allocation:
A Practical Perspective
by Tatsuyuki Ishi
Basic RA: Linear Scan
Liveness
0
1
2
3
Free registers
r0,r1,r2
r1,r2
r2
r1
r0
r1
r2
r1
Poor Spilling with Linear Scan
- Outside of loop allocated before inside of loop
- Less available registers inside the loop
- Spills tend to take place inside of loops! (Slow)
Fixing Linear Scan
-
Backtracking allocation
When under register pressure,
evict variable with lower spill cost -
SSA-Based RA
Spilling decoupled and
performed before RA
Backtracking RA
Liveness
0
1
2
3
Free registers
r0,r1
r1
r0
r1
Backtracking RA
Liveness
0
1
2
3
Evicted
r1
r1
r0
r1
Evict variable 0:
Variable 0 is now spilled - better!
Backtracking RA
- Better spill decisions
- Free-list based fast liveness not possible
- Guaranteed progress; but non-polynomial worse case behavior
Backtracking RA
SSA-based RA
SSA
v1 = ...
v2 = ...
v3 = add v1, v2
v4 = add v2, v3
...
one definition for each variable
Potentially multiple uses
SSA-based RA
SSA Graph colorable in quadratic time!
(num_variables × num_regs)
How: Just do the Linear Scan
But: RA is NP-complete
There is no contradiction:
the optimality only applies to basic blocks
Hack, Sebastian. “Register allocation for programs in SSA form.” International Conference on Compiler Construction (2006).
RA across basic blocks
v1 = add ..., ...
if A
v2 = add ..., ...
v3 = add v2, v2
v4 = if A then v1 else v3
r1
r1
r2
Problem: v1 and v3 does not match
→ need to insert moves!
(To fix this, we need heuristics approaches to do lookahead / propagate constraints from future instructions)
Repairing
Liveness
0
1
2
3
r0
Colombet, Quentin et al. “Graph-coloring and treescan register allocation using repairing.” 2011 Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES) (2011): 45-54.
Repairing
Liveness
0
1
2
3
r0
r0
r1
Colombet, Quentin et al. “Graph-coloring and treescan register allocation using repairing.” 2011 Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES) (2011): 45-54.
Repairing
Liveness
0
1
2
3
r0
r0
r1
r2
Colombet, Quentin et al. “Graph-coloring and treescan register allocation using repairing.” 2011 Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES) (2011): 45-54.
Spilling
SSA graph chromacity
=
max-clique
=
max-live
(Also true for chordal graphs!)
We know the number of variables
that need to be spilled.
Spilling
MIN algorithm: Spill largest next-use distance
z = ...
while x > 0:
y = ...
x = y - ...
w = z + ...
Braun, Matthias and Sebastian Hack. “Register Spilling and Live-Range Splitting for SSA-Form Programs.” CC (2009).
// Spill x, y or z?
Spill z.
x and y are used in loop and have larger next-use distance than z
SSA-based RA: Conclusion
Why SSA RA?
- Fast free-list
- Fast spilling
- Fast liveness tracking
- Register count known before RA
- Useful for GPUs (flexible size register file)
- Implementation: RADV ACO
Why not SSA RA?
- Inherent linear order
- Poor handling of fixed register constraints
- Poor handling of exotic register constraints (e.g. vectors from consecutive registers)
Register Allocation: A Practical Perspective
By Tatsuyuki Ishi
Register Allocation: A Practical Perspective
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