evolution of electronic packaging

JTAG Boundary Scan

• Introduction
• Device Architecture
• Board Level Application
• Demo

joint test acCESS group

BOUNDARY SCAN

Motivation for BOUNDARY SCAN

• Modern Packaging
• Board Testing Issues

serial shift register around the boundary of the device

 PRINCIPLE of Boundary scan architecture

USING BOUNDary scan path

boundary scan cell

Note: This is just an example.

video

DEVICE architecture

instruction register

standard instruction

TAP controller

(test access port)

tap controller

tap controller state diagram

bypass register

identification register

boundary scan register

general strategy

Step 1 - Carry out a board-level boundary-scan infrastructure test

Step 2 - Use the Extest instruction to select the boundary-scan registers

Step 3 - Apply tests to the non-boundary-scan devices

interconnect test example

testing non-boundary scan devices

testing a ram array via boundary scan

tester hardware

the explosive growth of boundary scan technology

references

IEEE 1149.1 JTAG and Boundary Scan Tutorial by Dr. Ben Bennetts

DEMO

DEmo videos

END